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Computer Architecture

Status register

A status register (also called a flags register or condition code register) is a set of bits in a CPU that records the outcome of arithmetic and logic operations. These bits, called flags, indicate conditions such as zero, carry, overflow, sign, and parity, and are used by conditional branch instructions to alter program flow. Status registers are a fundamental component of most instruction set architectures, from early microprocessors to modern RISC and CISC designs.

1
flags typically in a status register
common count
1960s
era of early status register designs
historical period
x86
architecture with a prominent flags register (RFLAGS)
example
1

Purpose and operation

The status register stores condition flags that reflect the result of the most recent arithmetic or logical operation. For example, after an ADD instruction, the zero flag (Z) is set if the result is zero, the carry flag (C) is set if there is a carry out of the most significant bit, and the overflow flag (V) is set if the result exceeds the representable range. These flags are then tested by conditional branch instructions (e.g., branch if equal, branch if less than) to implement decision-making in programs.

Flags are typically updated automatically by the ALU, but some architectures allow explicit setting and clearing via instructions like CLC (clear carry) or STC (set carry). The exact set of flags varies: common ones include sign (N), zero (Z), carry (C), overflow (V), and parity (P). Some processors also have auxiliary flags for BCD arithmetic, such as the half-carry flag in 8-bit microprocessors.

2

Architectural variations

Different instruction set architectures implement status registers in distinct ways. In x86, the flags are stored in a dedicated register called RFLAGS (or EFLAGS in 32-bit mode), which includes arithmetic flags as well as system flags like the interrupt enable flag (IF) and direction flag (DF). In contrast, ARM processors use a Current Program Status Register (CPSR) that holds condition flags and control bits, and they allow conditional execution of most instructions based on these flags.

RISC architectures like MIPS and RISC-V do not have a dedicated status register; instead, they use a general-purpose register (e.g., $zero comparisons) or a separate set of condition registers (e.g., PowerPC's CR). This design choice trades off simplicity for more explicit control. Some architectures, like the 6502, have a single status register with flags that are directly accessible and can be pushed onto the stack for subroutine calls.

3

Lesser-known aspects

Beyond the common flags, some processors include less-known bits. For instance, the 8080 and Z80 have a half-carry flag (H) used for BCD arithmetic, and the 68000 has a mode flag that distinguishes user and supervisor states. The x86 RFLAGS includes the trap flag (TF) for single-step debugging and the alignment check flag (AC) for memory alignment enforcement.

In some architectures, flags are not automatically updated by all instructions; for example, in ARM, only instructions with the S suffix update the flags. This allows for efficient code that avoids unnecessary flag updates. Additionally, some processors have a 'condition code' register that is separate from the main status register, such as the CR in PowerPC, which contains multiple 4-bit condition fields.

Historically, the PDP-8 had a link bit that served as a carry flag, and the IBM System/360 used a program status word (PSW) that combined the program counter and condition code. These early designs influenced modern status register implementations.

4

Role in modern computing

Status registers remain essential for efficient branching and exception handling. In modern processors, flags are used for speculative execution and branch prediction, as the CPU must predict the outcome of conditional branches based on flag values. They also play a role in SIMD and vector processing, where flags may indicate per-lane conditions.

In security, the status register can be a target for attacks: the 'flags' can leak information through side channels, and some vulnerabilities involve manipulating flags to bypass checks. For example, the 'Meltdown' and 'Spectre' exploits rely on speculative execution that may leave traces in the flags.

Despite the rise of high-level languages, compilers still generate code that relies on status flags for optimizations, such as using the carry flag for multi-precision arithmetic. Thus, the status register remains a low-level but critical component of computer architecture.

Glossary

Flag
A single bit in a status register that indicates a condition, such as zero or carry.
Condition code
Another name for a flag, especially in IBM and some RISC architectures.
Program Status Word (PSW)
A register in IBM System/360 that combines the program counter and condition code.

Status registers are also known as condition code registers or flags registers.