Other meanings of Semiconductor
Engineering
Semiconductor device fabrication is the process of creating integrated circuits and discrete semiconductor devices on a wafer of semiconducting material, typically silicon. The process involves hundreds of steps, including photolithography, doping, etching, and deposition, to build the microscopic transistors and interconnects that form electronic chips. This manufacturing technology underpins the modern electronics industry, enabling the production of microprocessors, memory chips, and sensors used in virtually all electronic devices.1
The fabrication process begins with a cylindrical ingot of high-purity silicon, grown via the Czochralski method, which is sliced into thin wafers and polished to a mirror finish.2 Photolithography then patterns the wafer by coating it with a light-sensitive photoresist, exposing it to ultraviolet light through a photomask, and developing the resist to create a stencil. Etching removes material from unprotected areas, either through wet chemicals or plasma-based dry etching, to define transistor structures. Doping introduces impurities such as boron or phosphorus into the silicon to alter its electrical conductivity, often using ion implantation followed by annealing to activate the dopants. Deposition steps, including chemical vapor deposition (CVD) and physical vapor deposition (PVD), add thin films of insulators, conductors, and semiconductors. Finally, metallization creates the interconnects that link transistors, and the wafer is passivated with a protective layer.
Fabrication occurs in cleanrooms where air is filtered to remove particles, and operators wear full-body suits to minimize contamination. The number of particles per cubic meter is strictly controlled; for advanced nodes, the cleanroom must meet ISO Class 1 or better, with fewer than 10 particles larger than 0.1 micrometers per cubic meter. Yield, the percentage of functional chips per wafer, is critical to profitability, and defects caused by particles, process variations, or design errors can reduce yield. To improve yield, manufacturers use statistical process control and advanced metrology to monitor each step. The cost of a modern fab, such as TSMC's 3nm facility, exceeds $20 billion, making yield optimization essential for economic viability.
As feature sizes shrink, fabrication techniques evolve to overcome physical limits. Extreme ultraviolet (EUV) lithography, using 13.5 nm wavelength light, enables patterning of features below 7 nm, and is now used in high-volume manufacturing for 5nm and 3nm nodes. FinFET and gate-all-around (GAA) transistor architectures replace planar designs to improve electrostatic control and reduce leakage. After wafer processing, chips are tested, diced, and packaged. Advanced packaging technologies, such as 2.5D and 3D integration, stack multiple dies to increase performance and reduce footprint, as seen in high-bandwidth memory (HBM) and chiplet designs.
Beyond silicon, compound semiconductors like gallium arsenide and silicon carbide are fabricated for high-frequency and high-power applications, using similar but distinct processes. The term "fabless" refers to companies that design chips but outsource fabrication to foundries like TSMC, a model pioneered in the 1980s. Historically, the first integrated circuit, built by Jack Kilby in 1958, was fabricated on a small piece of germanium, not silicon. The semiconductor industry also relies on ultra-pure water, with resistivity above 18 megohm-cm, and on gases like silane and arsine, which are highly toxic and require strict safety protocols. Additionally, the environmental impact of fabrication is significant, with a single fab using millions of gallons of water per day and emitting greenhouse gases such as perfluorocarbons.3
Semiconductor device fabrication is a cornerstone of modern technology, with continuous innovation driving the industry forward.
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