Other meanings of Overflow flag
Computer architecture
The Overflow flag is a CPU status flag indicating signed arithmetic overflow: the computed result cannot be represented in the operand width using two’s-complement signed integers. It is distinct from the carry flag, which describes unsigned carry or borrow behavior.
The overflow flag records whether a signed addition or subtraction produced an unrepresentable result. For an N-bit two’s-complement value, the signed range is −2N−1 through 2N−1−1; arithmetic is performed at the fixed width, so a mathematically valid result outside that interval wraps to a bit pattern with a misleading sign. The flag preserves evidence of that condition for a subsequent conditional branch or other instruction.1
Overflow is about interpretation, not a defective hardware result. The low N bits are the defined modular result, while the flag says that those bits do not represent the exact signed answer. A processor may name the bit OF, as on x86, or V, as in the ARM condition-code register.12
Signed addition overflows when two operands with the same sign produce a result with the opposite sign. Thus, positive plus positive becoming negative and negative plus negative becoming positive set the flag; adding unlike signs cannot overflow. A compact bit-level test is OF = (¬(asign xor bsign)) and (rsign xor asign), where r is the fixed-width result.
For subtraction, overflow occurs when the operands have opposite signs and the result’s sign differs from the minuend’s sign. The equivalent carry-based implementation depends on the processor’s adder and flag conventions, but the signed interpretation is architectural. The carry flag can therefore be set without signed overflow, and signed overflow can occur without the unsigned carry pattern that programmers expect; the two flags answer different questions.12
Instruction sets differ in whether they expose this condition as a persistent status bit. x86 arithmetic instructions such as ADD and SUB update OF, and conditional branches such as “jump if overflow” can test it; signed comparisons commonly combine OF with the sign flag. AArch64 arithmetic instructions can set the NZCV condition flags, including V, when their flag-setting forms are selected.12
RISC-V deliberately has no implicit overflow flag or condition-code register. Its integer arithmetic produces the low-width result, and software must use comparisons or wider intermediates when it needs to detect signed overflow. Compiler built-ins can provide checked operations without relying on a particular machine flag, while intermediate-representation systems such as LLVM distinguish ordinary wrapping arithmetic from operations carrying overflow semantics.34
The overflow flag is often transient: a later arithmetic or logical instruction may overwrite it, so code must test or preserve it at the right point. Some instructions leave it unchanged, and bitwise instructions commonly clear or preserve selected flags according to architecture-specific rules rather than mathematical convention.1
Overflow detection is also separate from the policy chosen after detection. A program may trap, report an error, widen the calculation, deliberately accept wraparound, or use saturating arithmetic, which clamps the result to the signed endpoint instead of wrapping. In language implementations, signed overflow may have language-specific consequences rather than simply producing the machine’s wrapped bits; GCC consequently supplies checked-overflow built-ins whose behavior is defined independently of ordinary signed expressions.3 The flag is consequently a low-level diagnostic signal, not a universal promise about a programming language’s numeric semantics.
Flag names, update rules, and available instructions are architecture-specific; the entry describes the common signed-arithmetic meaning.
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